In recent years, to further cope with both high density of a semiconductor element and high pin count of electrode terminals, narrow pitch and area reduction of electrode terminals of a semiconductor element have been aimed for.
Usually, in flip-chip mounting, mounting is carried out by forming protruding electrodes such as solder bumps and the like on the electrode terminals of a semiconductor element such as an LSI and the like, melting the solder layers formed beforehand on the electrode terminals through pressing with heating of the semiconductor element turned face down against the connection terminals of the mounting board, and allowing connection to be carried out.
But, because the progress for narrow pitch is remarkable, when one line or two lines of the electrode terminals of the semiconductor element are arranged, as conventionally, in the outer periphery part by a means in a staggered manner, a short circuit may occur between the electrode terminals, and connection inferiority and the like may occur due to a difference in thermal expansion coefficients between the semiconductor element and the mounting board. Accordingly, a method of widening, by arranging the electrode terminals in the form of an area, the pitch between the electrode terminals has been taken, but the progress for narrow pitch becomes remarkable in recent years also in an area arrangement, and strict requirements are demanded also regarding the solder layer formation technique on the electrode terminals of a semiconductor element or a mounting board.
Conventionally, as a technique for solder layer formation onto electrode terminals of the semiconductor element, a plating method or a screen printing method, a ball mounting method and the like are used, but the plating method, which is suited for narrow pitch, has problems of productivity in that the step becomes complicated, and in that a facility line increases in size.
Moreover, it is difficult for the screen printing method or the ball mounting method, which is superior in productivity, to deal with narrow pitch because a mask is used.
In a situation like this, several techniques are proposed for selectively forming solder on the electrode terminals of an LSI element or the connection terminals of a circuit board in recent years (for example, see Japanese published patent application 2000-094179). These techniques, which are not only suited for formation of fine bumps but also superior in productivity because the solder layers can be formed en bloc, begin to be noticed.
As for the above mentioned techniques, in the technique proposed in Japanese published patent application 2000-094179, in the first place, a solder paste with a mixture of solder powders such that oxide films have been formed on the surfaces and a flux is applied to the whole area on the circuit board on which the connection terminals are formed. And, by heating the circuit board in that state, the solder powders are allowed to be melted, and the solder layers are selectively formed on the connection terminals without causing short circuits between the contiguous connection terminals.
However, in this solder layer formation method, because the intervals between the electrode terminals are narrow, even if washing after the solder paste melting is performed, unmelted solder powders or flux components remain between the electrode terminals, and the problem is that, under a usage environment after the flip-chip mounting, bridge inferiority or migration inferiority occurs.
As a method of solving these problems, proposed is a solder layer formation technique of allowing solder powders to selectively attach onto the electrode terminals by superposing a support medium, to which the solder powders are attached, on a semiconductor element or a circuit board, and carrying out heating and pressurization (for example, see WO2006/067827 pamphlet).
FIGS. 9(a)-(e) are explanatory drawings of the step of performing solder layer formation (precoating) proposed in WO2006/067827 pamphlet, which allows the solder to attach to the soldering part of the work beforehand. In what follows, that step is described.
In the first place, the adhesive agent 52 is applied to one side of the support medium 51 (FIG. 9(a)).
Next, the powder solders 53 are sprinkled on the adhesive agent 52, which has been applied to the support medium 51, to an extent such that the adhesive agent 52 is hidden (FIG. 9(b)).
After that, by raking the powder solders 53 on the support medium 51 with the brush 54, the redundant powder solders 53 that are not adhered to the adhesive agent 52 are removed, and the powder solders 53 are allowed to be uniform (FIG. 9(c)).
On the other hand, the liquid flux 58 is applied, with the spray fluxer 57, to the face on which the soldering part 56 of the work 55 is formed (FIG. 9(d)). The numeral 59 denotes the resist.
Next, the flux application face of the work 55 and the powder solder adhesion face of the support medium 51 are superposed. At this time a pressure is exerted between the work 55 and the support medium 51 from above the support medium 51 with a pressing machine that is not shown. Then, because the adhesive agent 52 has flexibility and followability, the powder solders 53 that have been adhered to the adhesive agent 52 come into contact with the soldering part 56 when the pressure is exerted against the support medium 51 (FIG. 9(e)).
And, when the superposed work 55 and support medium 51 are heated and pressurized with a heating device that is not shown, the powder solders 53 are diffused at the interface with the soldering part 56 and joined thereto. And, after cooling, when the support medium 51 is removed from the work 55, the powder solders 53 that have been diffused at the interface with the soldering part 56 and joined thereto are left on the soldering part 56, and the powder solders 53 on the resist 59 are removed along with the support medium 51.
After that, the solder layers are formed, in case the work 55 is a semiconductor element, on the electrode terminals by melting the powder solders 53 on the soldering part 56 with a reflow furnace.
With this solder layer formation method, solder layers can be formed also on the narrow-pitch electrode terminals, it is not necessary to perform a complicated step with a large-sized facility line like electrolytic plating, and production can be easily carried out with high productivity.